The present invention relates to a method for manufacturing field emitter arrays on a silicon-on-insulator (SOI) wafer by means of local oxidation of silicon (LOCOS) and for manufacturing field emitter arrays incorporated with MOSFETs (Metal Oxide Semi-conductor Feild Effect Transistors) on an SOI wafer.
The prior art to which the invention is related includes a method for manufacturing a low voltage driven field emitter array (the U.S. Pat. No. 5,651,713), which can make. gate hole patterns on a silicon substrate with the diameter of less than 0.5 .mu.m and smaller than those formed by a photomask aligner by reducing the sizes of gate holes by LOCOS technique that has been used in the conventional semi-conductor manufacturing process.
The other prior arts are a method for manufacturing Si-FEAs (the U.S. Pat. No. 5,688,707) formed uniformly over a large area by etching polycrystalline or amorphous silicon layer deposited on an insulating substrate.
The former method for manufacturing a low voltage driven field emitter array provides a field emitter array on a silicon substrate with gate holes, the diameters of which are smaller than those formed by a photomask, reduced gate electrodes corresponding to the reduced gate holes and small metal field emitter tips suitable to the reduced gate electrodes, using a process for reducing the size of the gate holes during the gate insulating layer formation step.
According to the above method for manufacturing a low voltage driven field emitter array, a starting material may be a doped silicon substrate or a quartz substrate deposited thereon with a doped polycrystalline silicon or amorphous silicon. Further, according to the latter method for manufacturing Si-FEAs, silicon field emitter arrays can be formed uniformly over a large area with pixels insulated therebetween, using polycrystalline or amorphous silicon layer deposited on an insulating substrate as a starting material.
For using the metal field emitter array or Si-FEA made as above for a field emission display, each cathode line should be electrically isolated from others, through the junction isolation, which may makes the array liable to be unreliable and cause the manufacturing processes complex.
More particularly, a matrix panel of a field emission display has to be provided with isolated wells and gates crossing each other and electrons are emitted from microtips located on crossing points by an adequate voltage simultaneously applied between gates and wells functioning as cathodes and then accelerated toward the corresponding anode, thus producing light from the cathodoluminescent phosphor on the anode. Unfortunately, the steps for making well-to-well electrical isolation of the array for use in the above display have such problems as the above mentioned. The inventors have invented methods for manufacturing field emitter arrays in which electrical isolation between one cathode line and the other may be accomplished without junction isolation for solving the above problems.